MIC Verification/Design Intern Job in Guadalajara, Jalisco Mexico
The successful candidate will be responsible for for verifying the latest MIC chip logic at full chip. This will include responsibilities ranging from testbench development to writing and executing a test plan. Your responsibilities will include but not be limited to:
- Performing modeling and simulation, random and focused stimulus generation and coverage analysis
- Developing or using checking software to compare model behavior against a specification
- Debugging mismatches in the above behavior
- Bringing up new models in VCS
- Debugging emulation failures
- Running content on both an emulator and simulator
You must possess a minimum of Bachelor Degree in Computer Engineering or Electrical Engineering; Masters Degree in Computer Engineering or Electrical Engineering preferred.
Minimum Requirements:
- Knowledge of basic verification engineering principles
- Basic linux/unix knowledge
- Experience industry simulations
- Experience with GDDR interface, CPU design, PCIE, or cache cohearancy
- Knowledge of C and/or C++, System Verilog
- Experience with Specman and e-code a plus
- Experience and/or knowledge of industry standard methodologies like eRM, OVM, UVM a plus
