Analog IC Verification Engineer – Cambridge

This is a key role within an expanding IC design team. This engineer will be responsible for the top level IC validation in the simulation environment. They will also assist IC designers with block level verification.

Role:

Validating Mixed Mode IC designs in simulation environment
Integrating and validating external IP Blocks
DRC and LVS
Regression testing

Skills:

Knowledge of Analog Design or Analog Design experience
Cadence DFII experience
Ocean scripting
VerilogA
Linux Scripting experience
Very tools literate - e.g. Revision control issue tracking

In return for your skills and experience, you will be rewarded with a competitive salary and benefits package.

For more information, please get in touch !!!