ASIC-PD FLOW AUTOMATION DEVELOPER Job in Santa Clara, California Us
ASIC-PD FLOW AUTOMATION DEVELOPER #1414095
ASIC-PD Flow Automation Developer will develop software tools for NVIDIA's Timing Closure flows. These flows handle the automation of the timing closure and physical design of our large scale integrated circuits. A strong knowledge of object oriented programming in object oriented Perl and C++ is desired to take the tools to the next generation. Knowledge of timing closure, digital design, gate level Verilog netlist structures, and physical design concepts is required. This role will require interaction with project teams to support and improve the flow, and to provide regression and validation tests.
MINIMUM REQUIREMENTS:
- Great Object oriented programmer in Perl, C++. Java or Python a plus.
- Ability and drive to understand the motivation for tools, where they fit into the flow, how to prioritize features and to decide the best way to implement.
- Experience with Timing closure and Verilog netlist manipulation tools
- Track record in development of well structured, supportable, and testable code
- Knowledge of Physical design methodologies
EOE
Interested in talking with us? Please apply directly at NVIDIA.COM