ASIC Physical Design Engineer Job in Hillsboro 97124, Oregon Us
ASIC Physical Design Engineer
Job Description:
For this contract position with a world renowned computer manufacturing company, will be working on ASIC layout edits, timing analysis, and functional equivalency validation.
REQUIREMENTS
- ASIC physical design to ECO
- Find nearby bonus gates suitable to implement the ECO
- Work with the Logic Engineer to edit the net list
- Run functional equivalency validation to confirm edited net list matches new RTL model
- Potentially use write corresponding nets and LEC Cadence Tools to identify which routes to be modified
- Modify the layout
- Run PV (tool is primetime) timing check and adjust layout to meet timing constraints
- Run FEV final equivalent check, possibly including layout vs schematic
- Run Layout Verification (tool is Hercules) for DRCs (design rule checks) and other checks
- Tape In the database
- RTL model releases
Job Experience:
4+ years experience, senior level skills and BS required.
Years of Experience Required: 3-5 Years
For more information about career opportunities with CompuCom Excell Data visit www.excell.com. Equal Opportunity Employer
June 25, 2009
• Tags: ASIC Physical Design Engineer Job in Hillsboro 97124, Oregon Us • Posted in: General