Engineer, ASIC Design Job in Santa Clara 94067, California Us
Marvell. Moving Forward Faster.
Marvell offers revolutionary devices that touch every point of the communications infrastructure: switching, transceivers, wireless, PC connectivity, communications controllers, and storage. Our continuous cycle of innovations has enabled Marvell to consistently deliver the industry’s gold standard, emerging as the market leader in virtually all of our product categories.
Position Description:
Senior Design Engineer esponsible for the design, verification, and evaluation of digital circuits in high-speed data communication ICs. Duties include specification, design, RTL coding, verification, synthesis, timing, chip integration, test pattern development, post silicon debugging. Oversee layout activities. Should have hands on experience for all aspects of chip development process with proficiency in front end tools and methodologies. Have gone through a minimum of one full chip development cycles. Knowledge of Ethernet physical layer, PCIE, SERDES a plus but not required. SOC integration experience a plus.MSEE preferred.
To Apply Visit Marvell Semiconductor
Qualifications:
Proficient in digital design - RTL, Verilog, verification, synthesis, timing closureExperience in front end digital design methodology and have gone through at least one chip bring up.Good communication. Team player.MSEE Preferred.
Founded in 1995, Marvell Technology Group Ltd. has operations worldwide and approximately 5,000 employees. Marvell's U.S. operating subsidiary is based in Santa Clara, California and Marvell has international design centers located in the U.S., Europe, Israel, Singapore and China. A leading fabless semiconductor company, Marvell ships over one billion chips a year.