Engineers: Design Verification & Physical Design Job in San Jose 95134
SmartPlay Inc.
About the Job
Engineers
SmartPlay, Inc. is seeking:
Design Verification (DVUS01) Assist in Research, Dev and testing of electronics circuits, components and chips in telecom, networking, storage and graphic; create verification plans at module and chip level and dev the test bench, test cases, simulations using latest verification platform tools HVL, Verilog/VHDL System Verilog (?)
Physical Design (PDUS02) - Assist in creating physical designs and implementation of components for a multi-million gate SoC; all aspects of ASIC physical design
Requirements: MS in Eng., Elect. Engg., Electrical Engg. or equiv. or BS + 5 years of progressive exp. in the job offered, as a MTS eng., Des. Eng., Applic. Eng., CAD Eng. or related occupation. Job site/interview: San Jose CA. Send resumes with position code to 2680 N. 1st St., Ste 130, San Jose, CA 95134. M-F 9-5.
