High Frequency Engineering Team Lead– C++ Architect/Developer with Strong Hardware – London Based recruitment
(C, C++, Linux, UNIX, High Frequency, Low Latency, Networking, TCP, UPP, Co-location, FPGA, NPU, GPU, Kernel, Optimization, Protocols, Multi-threading, Java, Engingeering, iWARP, RDMA, 10-Gigabit Ethernet)
My client is a Successful and Profitable Global Investment Bank, well recognized for its strength and investment in cutting edge technology and its high performance electronic trading teams. Through continued focus in expanding its cross asset (equities, options, futures, FX, rates) high frequency trading teams, the firm is seeking a senior C/C++ architect/engineer to take a high responsibility role in London. You will have a huge amount of experience leading teams in the HFT space and you will be expected to contribute deeply on a technical level. The role will involve working alongside a number of business teams across all global regions, defining direction and strategy for high frequency engineering/hardware. You will interface with technologists across low latency, high frequency and systematic teams deeply understanding their architecture and hardware needs, translating this into cutting edge solutions and applications. You will lead a small team of technologists in London, therefore great communication skills and vision are of paramount importance. This is a business critical role and you will be instantly recognized as a significant figure in the global electronic trading business. Compensation will be extremely competitive and you will interact regular with global senior managers.
Ideal Skill Set for High Frequency Engineering Team Lead– C++ Architect/Developer with Strong Hardware Experience;
• Extensive experience with C/C++
• Experience in high frequency trading environment
• Co-location experience
• UNIX/Linux
• Kernel Optimization
• Networking (TCP/UDP)
• Ethernet/Infiniband
• Hardware Acceleration Technologies (FPGA, NPU, GPU etc)
• Great communication skills
• Experience leading a team
• Strong innovation/vision
• Ability to work in a fast paced, challenging, yet rewarding environment
Main Responsibilities for High Frequency Engineering Team Lead– C++ Architect/Developer with Strong Hardware (FPGA, Verilog, VHDL) experience
• Lead and manage a team of highly talented developers/engineers
• Work closely with groups across all asset classes (equities, options, futures, FX, rates) within high frequency, low latency and systematic trading to define needs
• Hands on design/architecture/optimization – Largely C/C++/Java
• Drive forward technical direction of the engineering team on a global basis
• Be wholly responsible for the low level engineering/hardware strategy and direction of the team globally
• Work closely alongside senior management team
This is an amazing opportunity for a very senior C/C++/hardware expert, with extensive experience in the electronic trading space to take a high responsibility, business critical and exciting opportunity within a leading bank. From day one you will instantly be recognized as a key figure in the global team, driving forward the development/engineering efforts of the team to ensure that the bank stays at the absolute forefront of high frequency/low latency technology. This role is suited to a driven character, somebody who wants to be challenged and work in a fast paced, yet very rewarding team. The firm is seeking a very strong and innovative technologists, with the rare blend of both software and hardware expertise, and for that compensation, benefits and bonus potential will all be extremely completive. For more information on the role, please contact cplusplus@selbyjennings.com or call 0207 019 4163 for more details.
(C, C++, Linux, UNIX, High Frequency, Low Latency, Networking, TCP, UPP, Co-location, FPGA, NPU, GPU, Kernel, Optimization, Protocols, Multi-threading, Java, Engingeering, iWARP, RDMA, 10-Gigabit Ethernet)