Internship (m/f) – MSP430 IC Design B/E
Internship (m/w) -
MSP430 IC Design B/E
Job ID 1541BR
Task:
The digital logic layout of an Ultra-Low-Power Microcontroller contains core modules such as CPU, DMA, BUS and memories. Theses digital core modules contribute significantly to the overall power consumption of the microcontroller.
The digital core layout shall be optimized with respect to power consumption. Based on existing design data base and layout, the sensitivity and optimization potential of power consumption w.r.t. various place and route strategies is to be evaluated and subsequently used for optimization. These strategies include:
§ Digital library cell utilization with multi-vt, multi-flavor cell library selections
§ Floorplan optimization
§ Timing constraint optimization
The internship will contain the following tasks:
§ Evaluate existing design power consumption based on Synopsys PTPX
§ Running PR experiments with Magma for various different contains
§ STA based on Synopsys PT
Prerequisites:
§ knowledge of RTL-level device modelling (VHDL, Verilog) and synthesis (i.e. lecture, laboratory)
§ Linux skills (scripting language, shell programming, etc)
§ Keen perception, acting on own initiative
OUR OFFER:
§ Competitive compensation
§ The opportunity to gather considerable experience and to put the theories you learned into practical application
§ Interesting projects
§ An international environment
§ A very pleasant, team-oriented working atmosphere
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