I/O RTL Designer (Verilog for Phy/Controller) (4692) Job in Boston 02109, Massachusetts US
We are an innovative tech company dedicated to collaborating with customers and technology partners to bring to life the next generation of computing/ graphics solutions at work, home and play.
Job Description: The IO design team is seeking a senior RTL designer.
Key Responsibilities:
- Defines architecture and creates Verilog for Phy/Controller IP blocks (examples: DDR, GDDR, HT, Ethernet, PCI Express, SATA, etc.)
- Participate in key standards definition groups
- Drive key forward-looking RTL initiatives
- Work with other functional groups (controller, verification, etc) to drive an overall solution
Skills, Education and Experience Requirements:
- MS or PhD degree with hands on industry experience of 8+ years
- In depth hands on design experience in high-speed IO interfaces, including PCIe, DDR/GDDR, HDMI/DVI, and etc
- Good communication, mentorship, and leadership skills
- Knowledge in high-speed SerDes architecture, clock data recovery systems, PLL and DLL
- Experience in lab debug
If interested in this excellent opportunity, please send your resume in a word attachment to: Brian@OneTenTech.com
REFERRAL BONUS
Do you know a friend or colleague who might be a great fit for this position? OneTenTech has the best referral bonus in the business! Refer a friend or colleague and when we place your referral at this position or any other, you will be handsomely rewarded with a referral bonus of up to $3,000!
Have a great day and we look forward to hearing from you soon!