Principal Analog Mixed Signal Design Engineers Job in San Diego, California US
A growing Semiconductor Company in the Phoenix, AZ area is looking for a Principal Analog Mixed Signal Design Engineer with PLL experience. We are looking for candidates nationwide willing to relocate to the Phoenix, AZ area.
This is an Analog / Mixed-Signal IC design engineering position that will provide key contributions to state of the art timing circuits for use in high performance networking and communications products. Involvement in product definition, design, layout, lab verification, and release to production is expected.
Specific Qualifications:
- An MSEE or Ph.D. with 15 years of professional IC design experience with strong emphasis on very high performance PLL design
- A solid track record in CMOS and BiCMOS IC design is required
- Strong experience in designing innovative low phase noise integer PLLs, fractional-N synthesizers, LC-VCOs, and low phase noise circuits is essential
- Related experience in high-speed frequency dividers, digital PLLs, crystal oscillators, VCXOs, on-chip regulators, DACs, ADCs, and RF circuits (mixers, filters, and LNAs) is desirable
- An understanding of transistor modeling and circuit noise theory is required
- Innovativeness, great attitude, self motivation, and excellent team work are essential
For consideration, please send your resume to Paul Montoya at pmontoya@kforce.com today!