Summary:
We are looking for a solid Analog / Mixed-Signal IC Design Engineer that will work with our team to provide key contributions to groundbreaking PLL’s for use in high performance communications  networking products. In this opportunity, you will play a vital role in the all aspects of product development – from definition to release.

Requirements:
- MSEE or Ph.D. with at least 3 years of professional IC design experience with significant emphasis on digital analog PLL designs and architectures.

- Key areas of interest include: digital PLL’s, low-phase noise integer and frac-N PLL's, delta-sigma converters, bias drivers, VCO's, regulators, and I/O's.  Proven experience in CMOS IC design is required.

- Proficiency in simulating system noise circuit analysis with Matlab or a similar tool is desired.

- Great attitude, good team work, and a strong self-motivation is a must.