Senior DFT Engineer
THE COMPANY:
Our client is a leading "Multi-Media" semiconductor firm as well as being a world-wide pioneer in cutting-edge technology. Our client's Power Management Components, System on Chip (SoC) applications, HD quality video products (DVD Blu-ray), optical storage solutions are recognized globally for their excellence in superior quality. They are actively seeking an "upper-echelon" Design for Test (DFT) Engineer to accelerate their efforts for the "Multi-Media" explosion poised to hit in 2011!!!
RESPONSIBILITIES:
- The ideal candidate will be working with an EDA methodology team as well as co-operating with design manufacturing teams to develop advanced testing design flows as well as solutions for high-speed/low-power/speed-or-power-grading testing flows.
REQUIREMENTS:
- The ideal candidate must have a MSEE with 5 years of related experience (PhD preferred) for Design for Test (DFT) Engineering.
- The ideal candidate must have technical experience as well as knowledge of sub-65nm speed-validation/binning, power-binning or even timing models analysis.
- The ideal candidate must have 3+ years of experience as well as be very familiar with modern Design for Test (DFT) concepts, flows, related commercial EDA tools.
- A candidate who has knowledge of hierarchical, high-capacity, power-aware ATPG flow experience is a plus.
- Candidates who have utility implementation experience are also a plus.
If interested in this excellent opportunity, please send your resume in a word attachment to: Jason@OneTenTech.com
REFERRAL BONUS
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