Senior IC Design Engineer Job in Sunnyvale 94089, California US
Title:
Senior IC Design Engineer
Description:
Adesto Technologies is looking for an experienced IC design engineer to actively participate and potentially lead complex development projects in advanced memory technologies.
Responsibilities:
Architect and Design custom memory blocks including access decoders, sense amplifiers, and write circuitries.
Design low power analog circuitry including band-gap voltage references, current references, voltage regulators (LDO), and charge pumps.
Top level integration and validation.
Silicon validation: Active role in silicon validation and bringing up test programs for new products.
Work Experience Requirements:
Minimum of 2-3 years direct experience in memory design, NVM design experience is a plus.
Experience with full chip integration both in design and layout is a plus.
Experience with spice simulator like Hspice, Eldo, Spectre, and Hsim.
Experience with Perl scripts is a plus.
Education Requirements:
MSEE or BS (EE)
Other Requirements:
jobs@adestotech.com (reference # 12ENG01)