Staff Mixed Signal Design Engineers (PLLs) Job in Austin, Texas US
A Growing Engineering Company in the Phoenix, AZ area is looking for a Sr. Analog Mixed Signal PLL Design Engineer. We are looking for candidates nationwide willing to relocate to the Phoenix, AZ area. Once again, the positions are in the Phoenix, AZ area.
The Sr. Analog / Mixed-Signal IC Design Engineer will provide key contributions to state of the art PLL's for use in high performance networking and communications products. This role has involvement in product definition, design, simulation, layout, lab verification, and release to production.
For consideration, please send your resume in a MS word format as an attachment to pmontoya@kforce.com today!
Qualifications:
- An MSEE or Ph.D. with 3 years of professional IC design experience with strong emphasis on analog and digital PLL designs and architectures is required
- Key areas of interest include low phase noise integer and fractional-N PLLs, digital PLLs, delta-sigma converters, VCOs, bias drivers, regulators, and I/Os
- A solid track record in CMOS IC design is required
- Proficiency in simulating circuit and system noise analysis with MATLAB or a similar tool is desired
- Great attitude, self motivation, and excellent team work are essential skills
September 26, 2010
• Tags: Staff Mixed Signal Design Engineers (PLLs) Job in Austin, Texas Us • Posted in: General