System Architecture RnD Engineer Job in Suwon, Moscow And Moscow Region Russian Federation

Processor (RP Core)
 [1-SRP] Electrical Hardware Design Engineer
-Design and development of the digital signal  processor (DSP), microprocessor, and another digital hardware for a wide variety of products including multimedia and software-defined radios

-Design of microarchitecture, RTL implementation, verification, and guiding the layout

-Coordination of design reviews, testing, documentation, required modifications, and design revisions of design prototypes to ensure products are prepared for production

-System verification and testing of production units

-Complete design at a module or system level and relay of requirements to a team of software engineers

[mSRP] Multicore Processor Architecture and Design
-Research and design of multicore architecture, ultralow-power processor, simulator, hardware, parallel programming for embedded processors as follows:
   Architecture Exploration: Research on (multi/many) processor core / subsystem
   Multicore Architecture Design: Efficient memory architecture network on a chip, parallel programming, OS, power management

   Processor SW / HW Design: Core HW / SW design, ultra-low power processor design, FPGA / ASIC design

-Research and design of embedded processor (especially, reconfigurable processor, multi/manycore processor) and ultralow-power processor

-All aspects of design to include architecture exploration, multi/many-core processor architecture, system, processor microarchitecture, simulator design, RTL implementation

 [SRP-SDK] SDK (Software Development Kit) Software Engineering
-Design and development of a wide variety of software development environment which includes the compiler, simulator, profiler, debugger, and other tools for embedded processors as follows:

  ·Compiler: front-end design including parsing and lexical analyzing, back-end design including code section, operation scheduling, register allocation, classical code optimization, architectural dependent code optimization, linking and binary generation

  ·Simulator and Profiler: compiled-code simulation, various levels of simulation including the function / instruction / cycle-level, transaction-level modeling, static and dynamic profiling, trace generation and management, wide spectrum of analysis of profiling result, etc.

  ·Debugger: single-core debugging environment, multi-core debugging environment

  ·Programming Language and Model: programming language design, parallel programming modeling and language design, etc.

-Development of all aspects of a tool-chain framework which includes the application build environment, graphical IDE (integrated development environment), automatic test environment, etc.

-Coordination of design review, testing, and documentation

-Various types of processor architecture exploration

-Guidance of and support to application programmers

Many-Core Architecture (Exascale Computing)
-Design and development of a many-core system which includes memory hierarchy, interconnection, and performance modeling for home and mobile domain as follows:

  ·Memory Hierarchy: Memory system design including local memory, shared memory between cores, MMU for the shared memory and data coherence scheme between cores,  etc.

  ·Interconnection: On-chip communication, atomic operation between cores, interface between core and memory, etc.

  ·Performance Modeling: Various level of performance simulation including  function- / instruction-level, transaction-level performance modeling for memory and interconnection system, etc.

Parallel Programming Language (Exascale Computing)
-Design and development of a parallel software development and performance tuning environment which includes parallel programming model, runtime environment, and performance tuning for application as follows:

  ·Parallel Programming Model: Program model design that includes the portable expression of concurrency and data locality, collective synchronization with dynamic parallelism

  ·Runtime Environment: Design the management of concurrency and data locality that includes core allocation and mapping, data location management with MMU, etc.

  ·Performance Tuning: Research on monitoring the behavior of parallel application that includes the request for core and memory, communications between the core and memory traffic. Research on the reconfigure behavior of application to improve performance that includes an application's concurrency and data locality