Analog IC Verification Engineer – Cambridge

This is a key role within an expanding IC design team. This engineer will be responsible for the top level IC validation in the simulation environment. They will also assist IC designers with block level verification.Role:Validating Mixed Mode IC designs in simulation environmentIntegrating and validating external IP BlocksDRC and LVS Regression testingSkills:Knowledge of Analog Design or Analog Design experienceCadence DFII experienceOcean scriptingVerilogALinux Scripting experienceVery tools literate – e.g. Revision control issue trackingIn return for your skills and experience, you will be Read more […]

August 26, 2007 • Tags: , , , • Posted in: General • Comments Off on Analog IC Verification Engineer – Cambridge