Senior RFIC Design Engineer Job in San Jose 95113, California US
Job Description: · Confirm circuits perform simulations using CADENCE tools such as SpectreRF. · Assess, debug, measure silicon in the laboratory. Design, verify, layout CMOS RF transceiver mixed-signal circuits for wireless applications, including amplifiers, filters, PLLs, mixers, LNAs, dedicated analog processing circuits. · Complete layout layout verification, as well as parasitic extraction. Job Requirements: · At least MS in Communication Systems or EE with three plus years of skill in the design simulation of RF Read more […]
April 4, 2008
• Tags: California Us, Senior RFIC Design Engineer Job in San Jose 95113 • Posted in: General • Comments Off on Senior RFIC Design Engineer Job in San Jose 95113, California US