Verification Engineer Job in San Jose 95128, California Us
Great opportunity with a growing company! We are looking for design verification experience in a large, complex design, preferably in a processor or large networking ASIC. Qualifications: • Develop block level verification strategy, testplan and/or testbench architecture • Develop testbenches and/or testbench components • Write directed and random test• Integrate RTL with testbench, run tests and debug failures Job Requirements • Minimum of 5 years of design verification experience in a complex ASIC or processor design • Excellent programming skills in System Verilog and VMM/OVM Read more […]
November 21, 2009
• Tags: California Us, Verification Engineer Job in San Jose 95128 • Posted in: General • Comments Off on Verification Engineer Job in San Jose 95128, California Us