Verification Engineer Job in San Jose 95128, California Us
Great opportunity with a growing company! We are looking for design verification experience in a large, complex design, preferably in a processor or large networking ASIC.
Qualifications:
• Develop block level verification strategy, testplan and/or testbench architecture
• Develop testbenches and/or testbench components
• Write directed and random test
• Integrate RTL with testbench, run tests and debug failures Job Requirements
• Minimum of 5 years of design verification experience in a complex ASIC or processor design
• Excellent programming skills in System Verilog and VMM/OVM
• Recent hands-on experience in building block level testbenches using System Verilog and VMM/OVM
• Good scripting skills, preferably in Perl
• Good communication skills, both verbal and written
• Good team player
If you are looking to grow your career with a great company, please click "Apply" now for immediate consideration.