Staff Design Engineer – 32-bit Advanced Process Design
POSITION REQUIRES 10-12 YEARS JOB EXPERIENCE- NOT SUITABLE FOR A NEW/ RECENT COLLEGE GRAD
32-bit APD group is seeking an engineer to perform ASIC flow development including but not limited to Synthesis, floor planning, static timing analysis and power analysis in sub-micron designs. In addition, this position requires design, simulate, optimize and validate the device variants for the 32-bit HPMD product family.
Job Requirements:
1. Experience in deep sub-micron (90nm and below) SOC design flow from RTL to GDS.
2. Hands on experience with synopsys tools such as Design Compiler, Prime Time SI, ICC, DFT compiler and formality.
3. Perform HDL design using the Verilog Language
4. Simulate at the module level and full-chip level to guarantee data sheet functionality and timing
5. Interface with and support applications, product and test engineering, marketing, development systems, technology development, CAD, layout and other design organizations
6. Validate and debug silicon products in support of Release to Production
7. Experience with power and noise analysis tools is a plus.
% of Travel Required : None
Skills : Engineering - Simulation, R D, Project Management, Electrical, Design
Offer Relocation : Maybe