ASIC Design Verification Engineer Job in Santa Clara 95054

Marvell Semiconductor, Inc. About the Job ENGINEER ASIC Design Verification Engineer at Marvell Semiconductor, Inc. (Santa Clara, CA). Multiple openings. Develop verif techniques processes. Reqs bachelor’s in elec eng, comp eng or related tech field 5 yrs progressive, post-bach exp in design verif. Will accept master’s in stated field in lieu of 2 yrs stated exp. Stated exp must incl: USB 2.0 verif IP design implementation, Ethernet verif IP design implementation, VMM, RAL, verif planning, test bench Read more […]

October 18, 2011 • Tags:  • Posted in: General • Comments Off on ASIC Design Verification Engineer Job in Santa Clara 95054