Chip/Package Co-Design Methodology Engineer (f/m) Job in Villach (At), Steiermark Austria
Job Description: As a methodology engineer (f/m) you will be responsible for the development of parts of Infineon’s internal chip/package co-design flow and methodology. This includes: Requirement collection, analysis and methodology definition-based inputs of our internal chip and package designers Evaluation of EDA tools and their features Definition, specification and implementation of script enhancements inside the EDA tools or the environment within Linux and Windows Coordination of feature/software development activities at EDA vendors or outsource partners Overall flow and methodology Read more […]
November 14, 2008
• Tags: Chip, m) Job in Villach (At), Package Co-Design Methodology Engineer (f, Steiermark Austria • Posted in: General • Comments Off on Chip/Package Co-Design Methodology Engineer (f/m) Job in Villach (At), Steiermark Austria