SENIOR TAPEOUT MASK DESIGN ENGINEER Job in Santa Clara, California Us
SENIOR TAPEOUT MASK DESIGN ENGINEER #1382035RESPONSIBILITIES:- Job responsibilities will include integrating and verifying fullchip layouts.- Use common industry standard layout design tools (Virtuoso) and verification suites (Cadence and Synopsys).- Should also have experience working closely with circuit designers to perform custom layout of complex designs as well as novel testchip structures.MINIMUM REQUIREMENTS- Formal layout design education, diploma required.- 3+ years of relevant layout experience in deep submicron CMOS process. – Experience with fullchip verification. – Ability to independently Read more […]
March 30, 2010
• Tags: California Us, SENIOR TAPEOUT MASK DESIGN ENGINEER Job in Santa Clara • Posted in: General • Comments Off on SENIOR TAPEOUT MASK DESIGN ENGINEER Job in Santa Clara, California Us