VLSI Design Engineer (Functional Verification) (4555) Job in San Francisco 94102, California US
Scope:
As a member of our central verification tools and methodology organization, define and implement new verification infrastructure solutions that improve the quality and time to market of all chip designs. Work with project design and verification teams at the design centers worldwide to analyze verification needs and deliver solutions as part of our common verification tool set.
Requirements:
· BS and 5+ years of experience, MS and 3+ years of experience, or Ph.D. and 1+ years of experience desired.
· Demonstrated technical experience with functional verification techniques and their application to verification of complex VLSI designs.
· Some experience with Verilog HDL, System Verilog, IP/SOC design flows, and verilog logic simulation is required.
· Experience with clock domain crossing and power verification techniques is strongly desired.
· Demonstrated technical expertise developing PERL, Ruby, and/or C/C++ applications using contemporary automated software development and testing processes is a must.
Experience developing systems using relational databases are a plus. Requires excellent communication, planning, and technical leadership skills.
If interested in this excellent opportunity, please send your resume in a word attachment to: Brian@OneTenTech.com
REFERRAL BONUS
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Have a great day and we look forward to hearing from you soon!